1. Field of the Invention
This invention relates to a method of manufacturing a substrate used for manufacturing silicon semiconductor elements, and more precisely, to a method of manufacturing a substrate for use in manufacturing silicon semiconductor elements comprising a silicon growth layer(s) formed on a silicon base substrate wafer, which is used for manufacturing silicon semiconductor elements such as individual semiconductor elements and integrated circuit elements.
2. The Prior Art
A wafer manufactured by forming a silicon growth layer(s), by means of the vapor phase growth method, on one surface of a silicon (Si) single crystal wafer, or of a wafer prepared by forming an impurity introduction layer(s) in a silicon single crystal wafer, or of a wafer prepared by forming a semiconductor element area(s) on a silicon single crystal wafer (hereafter these are referred to as "silicon base substrate wafers") plays an important role as a substrate for manufacturing silicon semiconductor elements, and that is in very great demand.
For example, a silicon epitaxial wafer used to manufacture IGBT (Insulated Gate Bipolar Transistor) which is a power semiconductor element combining the fast switching characteristic of a power MOSFET and the high-power characteristic of a bipolar transistor is manufactured by using the process described below.
An n+ silicon epitaxial layer with a thickness of approximately 20 micrometers and an n- silicon epitaxial layer with a thickness of approximately 180 micrometers are formed, by means of the vapor phase growth method, one after another on an approximately 450 micrometer-thick p+ silicon single crystal wafer which a conventional single-side mirror-polishing is performed, to obtain a silicon epitaxial wafer which has a n-/n+/p+ structure with a total thickness of approximately 650 micrometers. Approximately 200 micrometers of the p+ silicon single crystal wafer side is then removed by means of lapping and/or etching to obtain a silicon epitaxial wafer for manufacturing IGBT which has a n-/n+/p+ structure with a total thickness of approximately 450 micrometers.
In conventional methods such as described above, a substantial portion of the silicon single crystal which is the material for the silicon base substrate wafers is wasted, resulting in higher costs.
A silicon base substrate wafer with a thickness of approximately 450 nm is usually used to ensure the base substrate strength during the manufacturing process of the epitaxial wafer or to prevent deterioration of the crystalline quality due to thermal stress. However, after the epitaxial layer is formed, the base substrate wafer is lapped and/or etched down to obtain the final silicon epitaxial wafer with a prescribed total thickness. Specifically, approximately 200 micrometers of the thickness of the silicon base substrate wafer is removed by lapping and/or etching. Therefore, that amount of silicon single crystal is wasted.
Also, in the epitaxial growth process, there is a conductive problem in that the number of the silicon base substrate wafers to be treated in one epitaxial growth process is limited by the size of the vapor phase growth apparatus, and thus mass production is limited.